Open Access
| Issue |
MATEC Web Conf.
Volume 201, 2018
2017 The 3rd International Conference on Inventions (ICI 2017)
|
|
|---|---|---|
| Article Number | 02005 | |
| Number of page(s) | 3 | |
| Section | Invention of electrical engineering system | |
| DOI | https://doi.org/10.1051/matecconf/201820102005 | |
| Published online | 14 September 2018 | |
- T. Efland, et al., “Optimized Complementary 40V Power LDMOSFET Use Existing Fabrication Steps in Sub-Micron CMOS Technology,” IEEE IEDM Tech. Digest, pp. 399-402, (1994). [Google Scholar]
- P. G. Y. Tsui, et al., “Versatile Half Micron Complementary Bicmos Technology for Microprocessor Based Smart Power Applications,” IEEE Trans. on Electron Devices, pp. 564-570, March (1995). [CrossRef] [Google Scholar]
- B. J. Baliga, “Power Semiconductor Devices”, PWS Publishing Company. [Google Scholar]
- D. Brisbin, P. Lindorfer, P. Chaparala, “Substrate Current Independent Hot Carrier Degradation in NLDMOS Devices”, National Semiconductor Corporation, (2006). [Google Scholar]
- C. Contiero, P. Galbiati, M. Palmieri, Lodovica Vecchi, “Characteristics and Applications of A 0.6μm Bipolar-Cmos-Dmos Technology Combining VLSI Non-Volatile Memories”, IEDM, pp. 465-468 (1996). [Google Scholar]
- R. S. Wrathall, B. J. Baliga, K. Shenai, W. Hennessey, and T. P. Chow, “Charge Controlled 80 Volt Lateral DMOSFET with Very Low Specific On-Resistance Designed for An Integrated Power Process”, IEDM, (1990) [Google Scholar]
- A. Kumar, E. Y. Hapsari, V. Kumar, A. Mrinal, G. Sheu, and S. M. Yang, “Design of A Low on Resistance High Voltage (<100) Novel 3D NLDMOS With Side STI and Single P-Top Layer Based on O.18um BCD Process Technology”, (NMDC), (2013) IEEE 8th. [Google Scholar]
- S. M. Yang, EP Hema, A. Mrinal, Md Amanullah, G. Sheu, and PA Chen, “High Voltage NLDMOS with multiple-RESURF Structure to Achieve Improved On-resistance”, (CSTIC, 2015) pp. 1-3. [Google Scholar]
- A. W. Ludikhuize, “A review of RESURF technology”, (IEEE, 2000) pp. 11-18. [Google Scholar]
- A. S. Kashyap, H. A. Mantooth, T. A. Vo, and M. Mojarradi, ”Compact Modeling of LDMOS Transistors for Extreme Environment, Analog Circuit Design”, (IEEE, 2010) pp. 1431-1439. [Google Scholar]
Current usage metrics show cumulative count of Article Views (full-text article views including HTML views, PDF and ePub downloads, according to the available data) and Abstracts Views on Vision4Press platform.
Data correspond to usage on the plateform after 2015. The current usage metrics is available 48-96 hours after online publication and is updated daily on week days.
Initial download of the metrics may take a while.