MATEC Web Conf.
Volume 95, 20172016 the 3rd International Conference on Mechatronics and Mechanical Engineering (ICMME 2016)
|Number of page(s)||6|
|Section||Materials Handling Methods and Performance Analysis|
|Published online||09 February 2017|
- Tummala, Rao. Fundamentals of microsystems packaging. McGraw Hill Professional, 2001.
- Moore, Gordon E. “Cramming more components onto integrated circuits.”
- Brown, W. D. “Advanced Electronic Packaging with Emphasis on Multichip Modules. ed. Brown, WD. 1998.”
- Greig, William. Integrated circuit packaging, assembly and interconnections: trends and options. Springer Science & Business Media, 2007.
- Suhir, Ephraim, Yung-Cheng Lee, and C. P. Wong, eds. Micro-and Opto-Electronic Materials and Structures: Physics, Mechanics, Design, Reliability, Packaging: Volume I Materials Physics-Materials Mechanics. Volume II Physical Design-Reliability and Packaging. Vol. 1. Springer Science & Business Media, 2007.
- Vujošević, Milena. “Thermally induced deformations in die-substrate assembly.” Theoretical and Applied Mechanics 35, no. 1–3 (2008): 305–322. [CrossRef]
- Gao, Shubo. “New technologies for lead-free flip chip assembly.” PhD diss., Department of Electrical and Electronic Engineering, Imperial College, 2005.
- Chungpaiboonpatana, Surasit, and Frank G. Shi. “Advanced HiCTE flip chip packaging of 90-nm Cu/Low-K chips: Underfill, novel terminal pad structures, and processing optimization.” Journal of electronic materials 34, no. 7 (2005): 977–993. [CrossRef]
- Schubert, A., Dudek, R., Walter, H., Jung, E., Gollhardt, A., Michel, B., and Reichl., H. “Reliability assessment of flip-chip assemblies with lead-free solder joints.” In Electronic Components and Technology Conference, 2002. Proceedings. 52nd, pp. 1246–1255. IEEE, 2002.
- Wong, C. P., Shi, Songhua H., and Jefferson., G. “High performance no-flow underfills for low-cost flip-chip applications: material characterization.” Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on 21, no. 3 (1998): 450–458. [CrossRef]
- Zhang, Jian. “In-process stress analysis of flip chip assembly and reliability assessment during environmental and power cycling tests.” (2003).
- Zhang, Zhuqing. “Study on the curing process of no-flow and wafer level underfill for flip-chip applications.” (2003).
- Debnath, Sujan, X. Pang, Ekhlasur, Rahman, and Mohan Reddy, Moola. “Performance study of solder bond on thermal mismatch stresses in electronic packaging assembly.” (2012).
- Chen, W. T., and Nelson., C. W. “Thermal stress in bonded joints.” IBM Journal of Research and Development 23, no. 2 (1979): 179–188. [CrossRef]
- Matthys, L. and De Mey, G., 1996. An analysis of an engineering model for the thermal mismatch stresses at the interface of a uniformly heated two layer structure. International Journal of Microcircuits and Electronic Packaging, 19, pp.323–329.
- Mirman, Ilya B. “Effects of peeling stresses in bimaterial assembly.” Journal of Electronic Packaging 113, no. 4 (1991): 431–433. [CrossRef]
- Moore, Thomas D., and Jarvis., John L. “A simple and fundamental design rule for resisting delamination in bimaterial structures.” Microelectronics Reliability 43, no. 3 (2003): 487–494. [CrossRef]
- Ru, C. Q. “Interfacial thermal stresses in bimaterial elastic beams: modified beam models revisited.” Journal of Electronic Packaging 124, no. 3 (2002): 141–146. [CrossRef]
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