Open Access
Issue
MATEC Web Conf.
Volume 201, 2018
2017 The 3rd International Conference on Inventions (ICI 2017)
Article Number 02003
Number of page(s) 4
Section Invention of electrical engineering system
DOI https://doi.org/10.1051/matecconf/201820102003
Published online 14 September 2018
  1. P. Hower and S. Pendharkar, “Short and Long-Term Safe Operation Area Considerations in LDMOS Transistors”, IEEE, (2005) pp 545-550. [Google Scholar]
  2. P. Holland and P Igic, “A p+ /p-buffer/n-epi cmos compatible high-side RESURF LDMOS transistor for Power IC applications”, Microelectronics Journal 38, 762-766 (2007) [CrossRef] [Google Scholar]
  3. R. Zhu, V. Parthasarathy, V. Khemka, A. Bose and T. Roggenbauer, “Implementation of High-Side, High-Voltage RESURF LDMOS in a sub-half Micron Smart Power Technology”, IEEE, (2001) [Google Scholar]
  4. J.A. Appels and H.M.J. Vaes, “High Voltage Thin Layer Devices (RESURF Devices)“, IEEE, (1979) [Google Scholar]
  5. S. Hardikar, M. M. De Souza, Y.Z. Xu, T.J. Pease and E.M. Sankara Narayanan, “A Novel Double RESURF LDMOS for HVIC's”, Microelectronics Journal 35, Issue 3, 305-310 (2004) [CrossRef] [Google Scholar]
  6. P. Hower, J. Lin, S. Pendharkar, B. Hu, J. Arch, J. Smith and T. Efland, “A Rugged LDMOS for LBC5 Technology”, in Proc. 17th Int. Symp. Power Semiconductor Devices & IC's, May 3-26, Santa Barbara, CA (ISPSD 2005), pp. 327-330 [Google Scholar]

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