Open Access
Issue
MATEC Web of Conferences
Volume 57, 2016
4th International Conference on Advancements in Engineering & Technology (ICAET-2016)
Article Number 01004
Number of page(s) 4
Section Electronic & Electrical Engineering
DOI https://doi.org/10.1051/matecconf/20165701004
Published online 11 May 2016
  1. Neil H.E. Weste, David Harris and Ayan Banerjee“CMOS VLSI Design, a Circuit and SystemPerspective”, Third Edition, Pearson Education, Inc., (2005). [Google Scholar]
  2. Sung-Mo (Steve) Kang and Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis & Design”,Tata McGraw-Hill, (2005). [Google Scholar]
  3. Mahdiar Ghadiry, Mahdieh Nadi and Abu Khari A’Ain , “DLPA: Discrepant Low PDP 8-Bit Adder”, Journal of Circuits Syst. Signal Process, Vol. 32, Issue1, pp.1-14, (2013). [CrossRef] [Google Scholar]
  4. Deepak Garg, Mayank Kumar Rai, “ CMOS Based 1-Bit Full Adder Cell for Low-Power DelayProduct”, IJECCT 2012, Vol. 2 No.4, pp. 18-23, (2012). [Google Scholar]

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