MATEC Web Conf.
Volume 78, 20162nd International Conference on Green Design and Manufacture 2016 (IConGDM 2016)
|Number of page(s)||6|
|Published online||07 October 2016|
Process Characterization of 32nm Semi Analytical Bilayer Graphene-based MOSFET
1 Centre for Micro and Nano Engineering (CeMNE) College of Engineering, Universiti Tenaga Nasional (UNITEN), 43009 Kajang, Selangor, Malaysia
2 Institute of Microengineering and Nanoelectronics (IMEN) Universiti Kebangsaan Malaysia (UKM), 43600 Bangi, Selangor, Malaysia
* Corresponding author: email@example.com
This paper presents an inclusive study and analysis of graphene-based MOSFET device at 32nm gate length. The analysis was based on top-gated structure which utilized Hafnium Dioxide (HfO2) dielectrics and metal gate. The same conventional process flows of a transistor were applied except the deposition of bilayer graphene as a channel. The analytical expression of the channel potential includes all relevant physics of bilayer graphene and by assuming that this device displays an ideal ohmic contact and functioned at a ballistic transport. Based on the designed transistor, the on-state current (ION) for both GNMOS and GPMOS shows a promising performance where the value is 982.857uA/um and 99.501uA/um respectively. The devices also possess a very small leakage current (IOFF) of 0.289578nA/um for GNMOS and 0.130034nA/um for GPMOS as compared to the conventional SiO2/Poly-Si and high-k metal gate transistors. However, the devices suffer an inappropriate subthreshold swing (SS) and high value of drain induced barrier lowering (DIBL).
© The Authors, published by EDP Sciences, 2016
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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