| Issue |
MATEC Web Conf.
Volume 232, 2018
2018 2nd International Conference on Electronic Information Technology and Computer Engineering (EITCE 2018)
|
|
|---|---|---|
| Article Number | 04069 | |
| Number of page(s) | 4 | |
| Section | Circuit Simulation, Electric Modules and Displacement Sensor | |
| DOI | https://doi.org/10.1051/matecconf/201823204069 | |
| Published online | 19 November 2018 | |
Design of low-power 2FSK demodulation circuit
1
College of Information Science and Engineering, Shenyang University of Technology, China
2
College of Information Science and Engineering, Shenyang University of Technology, China
3
College of Information Science and Engineering, Shenyang University of Technology, China
a Guo Feng Liu: 768959069@qq.com
Aiming at the complex structure and high power consumption of the existing 2FSK demodulation circuit, this paper designs a simple structure and low power 2FSK demodulation circuit. A CMOS transistor matrix circuit is used to demodulate the 2FSK signals of 1200HZ and 2200HZ. The function model is established by using Matlab, and the number of sampling points is determined according to the simulation results and design requirements, and then the size of CMOS transistor matrix circuit is determined. The circuit uses Cadence software for functional verification, and HSPICE software is used for power consumption analysis. The simulation results meet the design requirements of low power consumption and achieve the desired demodulation effect.
© The Authors, published by EDP Sciences, 2018
This is an open access article distributed under the terms of the Creative Commons Attribution License 4.0 (http://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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