MATEC Web of Conferences
Volume 56, 20162016 8th International Conference on Computer and Automation Engineering (ICCAE 2016)
|Number of page(s)||6|
|Section||Image Processing and Application|
|Published online||26 April 2016|
An Optimized Structure on FPGA of Key Point Detection in SIFT Algorithm
1 School of Information Science and Engineering, Southeast University, Nanjing, China
2 School of Electronic Science and Engineering, Southeast University, Nanjing, China
SIFT algorithm is the most efficient and powerful algorithm to describe the features of images and it has been applied in many fields. In this paper, we propose an optimized method to realize the hardware implementation of the SIFT algorithm. We mainly discuss the structure of Data Generation here. A pipeline architecture is introduced to accelerate this optimized system. Parameters’ setting and approximation’s controlling in different image qualities and hardware resources are the focus of this paper. The results of experiments fully prove that this structure is real-time and effective, and provide consultative opinion to meet the different situations.
Key words: SIFT / pipeline architecture / Gaussian window function / approximating errors
© Owned by the authors, published by EDP Sciences, 2016
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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