MATEC Web Conf.
Volume 355, 20222021 International Conference on Physics, Computing and Mathematical (ICPCM2021)
|Number of page(s)||5|
|Section||Computing Methods and Computer Application|
|Published online||12 January 2022|
A novel method for on-chip debugging based on RISC-V processor
1 Key Laboratory of Agricultural Information Standardization, Ministry of Agriculture and Rural Affairs, China Agricultural University, Beijing 100083, China
2 College of Information and Electrical Engineering, China Agricultural University, Beijing 100083, China
3 Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China
4 Center of Materials Science and Optoelectronics Engineering, School of Microelectronics, University of Chinese Academy of Sciences, Beijing, China
5 Dept Math, China Agricultural University, Beijing 100083, China
* Corresponding author: email@example.com
An on-chip debugging method based on the RISC-V processor is introduced, which simplifies the complicated debugging operation into instructions and improves the debugging efficiency effectively. The method adopts a JTAG interface to realize the debugging functions of the processor, such as running control, software breakpoint, hardware breakpoint and single-step execution. The method was verified by simulation at the RTL level, and the logic synthesis was carried out in SMIC 180nm process library.
Key words: On-chip debugging / JTAG / RISC-V processor
© The Authors, published by EDP Sciences, 2022
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