MATEC Web Conf.
Volume 179, 20182018 2nd International Conference on Mechanical, Material and Aerospace Engineering (2MAE 2018)
|Number of page(s)||8|
|Published online||26 July 2018|
Architecture Design of Aviation Fault-tolerant Computer Based on ARINC659 Bus Technology
School of management, Xi'an Jiaotong university, Xi'an, CN
2 System Integration Center, FAI AVIC, Xi'an, CN
3 Landing Gear System Research Institute, FAI AVIC, Xi'an, CN
The ARINC659 backplane bus is suitable for high safety and high reliability requirements of aircraft on-board computer communication systems. This paper analyzes the structure of ARINC 659 serial backplane bus and the bus fault tolerance mechanism. On the basis of backplane bus, a 4 degree of aviation fault-tolerant computer is designed. Moreover, the computer architecture and computer system of the instruction branch and monitoring branch are designed in the computer channel. The fault-tolerant management of the computer is realized by bus fault tolerance, redundancy voting between computers and the monitoring of the instruction and monitoring branches.
© The Authors, published by EDP Sciences 2018
This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Current usage metrics show cumulative count of Article Views (full-text article views including HTML views, PDF and ePub downloads, according to the available data) and Abstracts Views on Vision4Press platform.
Data correspond to usage on the plateform after 2015. The current usage metrics is available 48-96 hours after online publication and is updated daily on week days.
Initial download of the metrics may take a while.