MATEC Web Conf.
Volume 173, 20182018 International Conference on Smart Materials, Intelligent Manufacturing and Automation (SMIMA 2018)
|Number of page(s)||5|
|Section||Modeling, Analysis, and Simulation of Intelligent Manufacturing Processes|
|Published online||19 June 2018|
FPGA Accelerating Core Design Based on XNOR Neural Network Algorithm
Graduate School of National of Defense Technology, Changsha, China
* Corresponding author : firstname.lastname@example.org
The current deep learning application scenario is more and more extensive. In terms of computing platforms, the widely used GPU platforms have lower computational efficiency. The flexibility of APU-dedicated processors is difficult to deal with evolving algorithms, and the FPGA platform takes into account both computational flexibility and computational efficiency. At present, one of the bottlenecks for limiting large-scale deep learning algorithms on FPGA platforms is the large-scale floating-point computing. Therefore, this article studies single-bit parameterized quantized neural network algorithm (XNOR), and optimizes the neural network algorithm based on the structural characteristics of the FPGA platform., Design and implementation of the FPGA acceleration core, the experimental results show that the acceleration effect is obvious.
© The Authors, published by EDP Sciences, 2018
This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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