MATEC Web Conf.
Volume 125, 201721st International Conference on Circuits, Systems, Communications and Computers (CSCC 2017)
|Number of page(s)||5|
|Published online||04 October 2017|
A New Stochastic Inner Product Core Design for Digital FIR Filters
1 Faculty of Engineering, Computing and Science, Swinburne University of Technology, Sarawak Campus, Malaysia
2 Heriot Watt University Malaysia, Wilayah Persekutuan Putrajaya, Malaysia
3 School of Software and Electrical Engineeing, Swinburne University of Technology, Hawthorn, VIC 3122, Australia
* Corresponding author: firstname.lastname@example.org
Stochastic computing (SC) is a computational technique with computational operations governed by probability instead of arithmetic rules. It recently found promising applications in digital and image processing areas and attracted attentions of researchers. In this paper, a new stochastic inner product (multiply and accumulate) core with an improved scaling scheme is presented for improving the accuracy and fault tolerance performance of SC based finite impulse response (FIR) digital filters. The proposed inner product core is designed using tree structured multiplexers which is capable of reducing the critical path and fault propagation in the stochastic circuitry. The designed inner product core can lead to construction of SC based light weight and multiplierless FIR digital filters. As a result, an SC based FIR digital FIR filter is implemented on Altera Cyclone V FPGA which operates on stochastic sequences of 256-bits length (8-bits precision level). Experimental results show that the developed filter has lower hardware cost, better accuracy and higher fault tolerance level compared with other stochastic implementations.
© The Authors, published by EDP Sciences, 2017
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