MATEC Web of Conferences
Volume 22, 2015International Conference on Engineering Technology and Application (ICETA 2015)
|Number of page(s)||8|
|Section||Information and Communication Technology|
|Published online||09 July 2015|
DualBLESS: Bufferless Router with Dual Ejection Ports for 2D and 3D NoC
1 School of Computer, National University of Defense Technology, Changsha, Hunan, China
2 The Department of Electronic Systems, Tsinghua University, Beijing, China
* Corresponding author: firstname.lastname@example.org
In this paper, the authors proposed a 1-cycle bufferless router with dual ejection ports (which is also called DualBLESS) for 2D and 3D Network-on-Chip. The router uses a simple route computer module, a MUX module instead of the Flit Ejector module and a MUX module in a baseline bufferless router to achieve high performance. Simulation results under six synthetic workloads illustrate that the two proposed DualBLESS routers achieve less average packet latency and higher throughput than the baseline 2D and 3D bufferless routers.
Key words: DualBLESS / bufferless router / Dual Ejection Ports
© Owned by the authors, published by EDP Sciences, 2015
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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