Modeling and verification of train departure scenario for next generation train control system

Lina Yang; Zhongtian Liu

doi:10.1051/matecconf/202133602008

All issues

Volume 336 (2021)

MATEC Web Conf., 336 (2021) 02008

References

Open Access

Issue		MATEC Web Conf. Volume 336, 2021 2020 2^nd International Conference on Computer Science Communication and Network Security (CSCNS2020)


Article Number		02008
Number of page(s)		7
Section		Industrial Design and Engineering Technology
DOI		https://doi.org/10.1051/matecconf/202133602008
Published online		15 February 2021

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[1] Y. He, “Research on the next generation train control system,” Railw. Commun. signal, vol. 53, no. 01, pp. 1-5, 2017 [Google Scholar]

[2] H. Wang, K. Li, H. Liu, and L. Zhang, “Train control system technology development trend analysis,” Railw. Commun. signal, vol. 52, no. 08, pp. 1-4, 2016 [Google Scholar]

[3] T. Gao, “Research on the new generation of train control system,” J. Lanzhou Inst. Technol., vol. 25, no. 02, pp. 74-77, 2018 [Google Scholar]

[4] J. Cheng, Q. Tian, X. Zhao, and D. Sun, “Discussion on Technical Scheme of Next Generation Train Control System,China Railw., vol. 12, pp. 32-15, 2014 [Google Scholar]

[5] C. Mo, “Study on selection of train autonomous positioning scheme for plateau railway signal system,” Railw. Commun. signal, vol. 56, no. 07, pp. 11-14, 2020 [Google Scholar]

[6] Z. Mo, “Research on overall technical scheme of CTCS-4 train control system,” Railw. ” Commun. signal, vol. 55, no. S1, pp. 34-40, 2019 [Google Scholar]

[7] Koh K Y,Seong P.H, “SMV model-based safety analysis of software requirements, ” J. Reliability. Engineering &System Safety, vol. 94, no. 02, pp. 320-331, 2009 [Google Scholar]

[8] Y. Wang, Z. Liu, “Modeling and verification of CTCS-1 level conversion scenarios [J]. Computer engineering and application,” Comput. Eng. Appl., vol. 55, no. 18, pp. 256-262, 2019 [Google Scholar]

[9] Blaha M, Rumbaugh J. Object-oriented modeling and design with UML[M].[S.l.]： Posts & Telecom Press, 2006 [Google Scholar]

[10] Clarke E M, Emerson E A, Sistla A.P. Automatic verification of finite state concurrent. system using temporal logic specifications ： a practical approach[C]//Proceedings Ninth Annual IEEE Symposium on Logic in Computer Science, 1994 [Google Scholar]