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All issues Volume 210 (2018) MATEC Web Conf., 210 (2018) 02040 References
Open Access
Issue
MATEC Web Conf.
Volume 210, 2018
22nd International Conference on Circuits, Systems, Communications and Computers (CSCC 2018)
Article Number 02040
Number of page(s) 4
Section Systems
DOI https://doi.org/10.1051/matecconf/201821002040
Published online 05 October 2018
  1. Z. Yan, P.I. Mak, R.P. Martins, “Two Stage Operational Amplifiers: Power and Area Efficient Frequency Compensation for Driving a Wide Range of Capacitive Load”, IEEE Circuits and Systems Magazine, (2011). [Google Scholar]
  2. H. J. Yang, and D. J. Allstot, “Considerations for Fast Settling Operational Amplifiers,” IEEE Trans. On Circ. and Syst., vol. 37, no. 3, pp.326-34, (Mar. 1990). [CrossRef] [Google Scholar]
  3. U. Chilakapati and T. Fiez, “Effect of Switch Resistance on the SC Integrator Settling Time,” IEEE Trans. On Circ. and Syst. II: Analog and Digital Sig. Proc., vol. 46, no. 6, pp. 810-815, (Jun. 1999). [Google Scholar]
  4. U. Chilakapati and T. Fiez, “Settling time design considerations for SC integrators,” IEEE Int. Symp. on Circ. And Syst., pp. 492-495, (Jun. 1998). [Google Scholar]
  5. G. Palumbo and S. Pennisi, Feedback Amplifiers Theory and Design. Boston, MA: Kluwer, (2002). [Google Scholar]
  6. G. Palmisano, G. Palumbo and S. Pennisi, “Design Procedure for Two-Stage CMOS Transconductance Operational Amplifiers: A Tutorial,” Analog Integrated Circuits and Signal Processing, vol. 27, pp. 179-189, (2001). [CrossRef] [Google Scholar]
  7. F. A. Amoroso, A. Pugliese, G. Cappuccino, Design Considerations for Fast-Settling Two-Stage Miller-Compensated Operational Amplifiers, Electronics, Circuits, and Systems, 2009. ICECS 2009, (2009), Page(s): 5-8. [Google Scholar]
  8. A. G. Gheorghe, F. Constantinescu, “Pole/zero computation for linear circuits”, 6-th European Symposium on Computer Modeling and Simulation, Malta, (Nov. 14-16, 2012). [Google Scholar]
  9. A. G. Gheorghe, F. Constantinescu, M. Nitescu, “Improved LR Algorithm for Computation of the Approximate Symbolic Pole/Zero Expressions”, AFRICON 2013, Mauritius, (9-12 sept., 2013). [Google Scholar]
  10. A. G. Gheorghe, F. Constantinescu, M. Niţescu, “State Matrix Simplification for Computation of the Approximate Pole/Zero Expressions”, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2015), Istanbul, Turkey, (7-9 September 2015). [Google Scholar]
  11. I. W. Sanberg, H. C. So, “A two-sets-of-eigenvalues approach to the computer analysis of linear systems”, IEEE Transactions on Circuit Theory, vol. CT-16, No. 4 (November 1969), pp509-517. [CrossRef] [Google Scholar]
  12. E. J. Davison, “On the calculation of zeros of a linear constant system”, IEEE Transactions on Circuit Theory, vol. CT-18, No. 1 (January 1971), pp. 183-184. [CrossRef] [Google Scholar]
  13. Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGrawHill, (2001). [Google Scholar]

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