A software radio platform based on ARM and FPGA

Xin. Yang; Zhengxiang. Li

doi:10.1051/matecconf/20165603004

All issues

Volume 56 (2016)

MATEC Web of Conferences, 56 (2016) 03004

References

Open Access

Issue		MATEC Web of Conferences Volume 56, 2016 2016 8^th International Conference on Computer and Automation Engineering (ICCAE 2016)


Article Number		03004
Number of page(s)		5
Section		Signal Analysis and Processing Technology
DOI		https://doi.org/10.1051/matecconf/20165603004
Published online		26 April 2016

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J. Delorme, J. Martin, A. Nafkha, C. Moy, F. Clermidy, P. Leray, and J. Palicot. “A FPGA partial reconfiguration design approach for cognitive radio based on NoC architecture” in Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. [Google Scholar]
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[1] Wang Ya-ting, High-speed data acquisition technology research based on ARM and FPGA, 2007. [Google Scholar]

[2] Long Zai-chuan, Feng Lin. “Embedded CCD acquisition system based on ARM and FPGA”, Optoelectronics • Laser, vol. 18, no.11, pp.1296–1298, 2007. [Google Scholar]

[3] ZHU Xiao-peng, XIAO Tie-jun, Zhao Hui. “ARM+FPGA for realtime data acquisition system design”, Computer Engineering and Design, vol. 30, no.13, pp.3088–3090, 2009. [Google Scholar]

[4] XU Xin-shun, JIA Zhi-ping. Embedded Linux Application Programming, People’s Posts & Telecom Press, 2008. [Google Scholar]

[5] J. van de Belt, P. D. Sutton, and L. E. Doyle, “Accelerating software radio: Iris on the Zynq SoC” in Very Large Scale Integration (VLSISoC), 2013 IFIP/IEEE 21st International Conference, pp. 294–295, 2013. [Google Scholar]

[6] Zhao Xiao-pu, Li Li, Song Hua “Gigabit Ethernet interface in S3C2440A System”, Electronic Design and Application, vol. 8, pp.101–103, 2007. [Google Scholar]

[7] A. Love, W. Zha, and P. Athanas. “In pursuit of instant gratification for FPGA design” in Field Programmable Logic and Applications (FPL), 2013 23rd International Conference, pp. 1–8, 2013. [Google Scholar]

[8] J. van de Belt, P. D. Sutton, and L. E. Doyle, “Accelerating software radio: Iris on the Zynq SoC” in Very Large Scale Integration (VLSISoC), 2013 IFIP/IEEE 21st International Conference, pp. 294–295, 2013. [Google Scholar]

[9] J. Delorme, J. Martin, A. Nafkha, C. Moy, F. Clermidy, P. Leray, and J. Palicot. “A FPGA partial reconfiguration design approach for cognitive radio based on NoC architecture” in Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. [Google Scholar]

[10] Wu Wei, Hao Jian-Xin, Lu Li. “High-speed data acquisition system based on ARM and FPGA”, Modern electronic technology, no.1, pp.126–128, 2009. [Google Scholar]