Simulation Studies of a Trench MOS Device Structure with Small Figures of Merit

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China  

Abstract

We proposed a vertical high permittivity trench power MOS (HKTMOS) device with alternating N&P drift region and high permittivity (HK) trench sandwiched in between. The unique structure guarantees uniform potential distribution for wide voltage range at block state owing to both HK potential modulation effect and superjunction (SJ) charge balance. The specific on-resistance (Rons) of HKTMOS is in orders of magnitude lower than the SJ counterparts at the on state because of the strong accumulation effect brought by HK trench. Although the gate charge also significantly rises because of the accumulation, the figures of merit (FOM) of HKTMOS still reduces considerably than the SJ under same BV. An expression for FOM is derived demonstrating that the FOM of HKTMOS is proportional to the square of HK trench depth, which agrees on with simulation results well. The simulation results indicate that within the BV range of 500~2000V, the Rons and FOM of HKTMOS are in 1~2 orders of magnitude lower and 17.4%~44.1% of SJ, respectively under the same BV condition. Furthermore, HKTMOS also demonstrates better charge imbalance tolerance than SJ.