Digital NBC Protection System BIT Optimization Design

BIT technology is an important means of system and equipment fault detection, location and isolation. This paper takes the digital NBC protection system as the research object, and carries out research on the optimization design based on BIT technology. Based on the structural division of the digital NBC protection systems and the analysis of typical failure modes, combined with the weighted cost index function and the selection method of the improved special hierarchically optimized optimal test set, the calculation and comparison of the indices of the actual digitalized NBC protection systems was conducted. Determine the optimal test set, and finally design the BIT circuit for the selected optimal test set.


Introduction
BIT testing technology is a new online fault detection technology that improves system reliability and reduces maintenance costs. It implements fault self-diagnosis of system circuits and key hardware units through hardware and software test units attached to the system [1]. The perfect BIT design can quickly and effectively detect, locate and isolate system faults, thus reducing maintenance and support links and saving manpower and material resources. In the field of weaponry, there are many successful applications for in-machine testing.
As the digitization and informatization process of armored equipment continues to accelerate, the proportion of numerical control subsystems in the electrical systems of armored vehicles is increasing, Online status detection and fault diagnosis have gradually become the main content of online fault diagnosis technology for electrical systems. With the application of more and more new power electronic devices and integrated circuits, there are many new problems in the fault detection and diagnosis of digital electrical subsystems. To this end, this paper selects the three-proof control system as the research object, and combines the completed digital three-proof controller design to carry out the research on the online fault diagnosis scheme of BIT technology.

Common BIT design methods and their advantages and disadvantages
At present, the more general BIT design methods for CNC systems mainly include Redundancy BIT, Surround BIT, Parallel BIT and digital BIT based on boundary scan . [2] 2.1 Redundancy BIT The redundancy BIT realizes the fault diagnosis of the circuit to be tested based on the comparison of the output results of the two sets of circuits by increasing the redundancy of the same function as the circuit under test. The online fault diagnosis based on the redundancy BIT has the advantages of not affecting the normal operation of the system and easy to implement the fault isolation function, but the design cost is high, and is usually used for fault diagnosis of key components.

Surround BIT
Surround BIT is widely used in the functional fault detection of microprocessor-based system peripheral hardware modules. It adopts the way of increasing the detection circuit and the hardware unit under test to form a loop, and implements the excitation through the processor I/O or other interfaces to judge the test loop response result, thereby realizing the fault detection of the hardware unit to be tested. Surrounding BIT has the advantages of simple principle, flexible design and low cost, and has a good application prospect in the numerical control electrical subsystem of armored vehicles.

Parallel BIT
Parallel BIT means that the system performs fault detection of the circuit and hardware unit under test while performing normal control functions. It has the advantages of simple BIT circuit design, low development cost and low system resource consumption.
The disadvantage is that the trigger of its detection function is limited by the system control timing.

Digital BIT based on boundary scan
The digital BIT design based on boundary scan is a fault detection method for integrated electronic devices. With the boundary scan structure built into the device under test, the system controls the boundary scan controller to implement online detection of faults such as static functions and line connections. Compared with other BIT design methods, the digital BIT based on boundary scan can break through the physical access restrictions, and has the advantages of wide test range and high standardization. However, the BIT design cost is high, and the acquisition of electronic devices with a boundary scan structure also has certain difficulties.

Selecting the optimal test set based on the improved special hierarchical optimization method
By analyzing the functional structure characteristics of the digital three-proof system and the above BIT design method, combined with the typical failure mode table of the digital three-proof system, the system fault alternative test set shown in Table 2. is designed. Table 1.shows the typical failure modes of the digital three-proof system. Based on the specific correspondence of each fault detection method in the alternative test set shown above, a typical fault mode set of the three-prevention system is established. Correlation matrix between F and candidate set T [3].
The above formula shows thatThe number of tests in the minimum test set T Ns=5;The minimum test set in set A(TM) consisting of the smallest test set Tm in T is also 5 Obviously because of Ns<Nmin, In order to achieve a better overall effect of the preferred test set, Introducing relaxation factor ζ=1 to determine the set A(Tm*), Using row vector increment 1 instead，Replace a4 in f with a5a7 get expression f* [4]，The same as f, consisting of 5 or items, can be expressed a Express each test set in A(Tm*) that has been listed as T*m1~T*m10, Weighted indicator function: Calculated as shown in Table 3. Compare the above 10 sets of test set weighted cost indicator function values: Test set T* m5 weighted cost indicator function has the smallest value ， f(T* m5 )=1.45 。 Therefore, the optimal test set of the typical three-defense control typical fault mode set is T* m5 ) (

System BIT specific design
According to the previous section, analyze the typical fault set for the digital three-proof system F,the most alternative optimal test set is TS,Select a typical test method from it,Optimal test set T*m5 is (t1,t2,t5,t9,t10).This section will give specific design BIT design methods and simple principles.

Detection design of poison alarm signal and nuclear alarm signal processing circuit around BIT
The BIT circuit is mainly designed for t2, and uses a surround BIT-based design method to detect the signal processing circuit. The specific circuit design is shown in Figure 1. According to the test analysis, these two signals are 24V voltage signals, and after modification, they are connected with the digital three-proof control box. Therefore, during this period, it is necessary to add and reduce the signal processing circuit, and the processed small signal is used as a dangerous situation alarm signal, that is, the core control chip I/O input. The surrounding BIT circuit designed in this section is responsible for detecting its signal processing circuit in real time. If the signal processing circuit fails, it is impossible to locate the fault location instantaneously on the signal sensor or the fault occurs on the signal processing circuit. Therefore, the test circuit is selected. The following is a brief description of the principles that enable real-time detection: When the core controller outputs a fault detection enable signal, Simulate the current nuclear pollution signal or chemical biological pollution signal by the surrounding BIT test circuit shown in the figure, the voltage signal of 24V, If the function of the nuclear pollution signal processing circuit is normal, the signal must be detected by the I/O input terminal of the core controller; otherwise, if the nuclear pollution signal processing circuit has a malfunction, it cannot be detected by the core control chip, Through this logic, if there is a fault point, the fault point can be successfully located. In the non-wartime use, in order to improve the accuracy of the detection, the general operation flow is to input the multiple-time detection enable signal, and determine the fault state based on the multiple diagnosis results. Figure  2.shows the surround BIT test circuit, Since the alarm is issued with 24V voltage, it cannot be directly input to the MCU. Therefore, the key function of the surrounding BIT test circuit is the step-down effect. Separated by optocoupler isolators, stepping down to the signal voltage input to the microcontroller. [5]

Atomic pollution alarm exposure meter and poison alarm circuit state detection BIT design
According to the theoretical analysis, the condition monitoring of the alarm illuminometer based on the constant current surrounding BIT circuit should be designed, mainly for . However, starting from the actual situation, the nuclear alarm exposure meter equipped with the equipment now has the function of self-detection, and can display the state of the required detection on its own instrument. So the article does not describe the design circuit here, and only needs to transmit the detected state information to the core control chip to form a unified management of the state detection amount. Now explain the principle of self-testing and satisfying the state quantity information we need: According to the actual situation, the alarm illumination meter is hoisted on the top deck in front of the cab, there is a test alarm time jack, socket ," Source check"and "Hand check" button on the panel. The most important is the source and the irradiation shutter linkage mechanism used in the movement's own self-test circuit. The workflow is briefly described as follows: The γ-ray receives a current pulse output from a detector element that receives the alarm circuit. The number of pulses output is proportional to the amount of γ-ray exposure, When the exposure reaches a certain rate, it is a dangerous situation. Then the corresponding output pulse is integrated and divided into a certain voltage of the circuit, Then trigger the working circuit to reach the alarm, so that the alarm indicator on the instrument can be illuminated. At the same time, the detection element ionization chamber of the measurement display circuit also outputs electric charge. The amount of charge varies with the amount of γ-ray irradiation, that is, the amount of accumulated γ-rays can be directly indicated by the counting of the digital tube. And now the amount of state I need to get is that is the working circuit for detecting γ -rays in good condition, Popularly speaking, its role is the role of a sensor signal. What is needed now is to detect the quality of the sensor signal. The source detection function is because the exposure meter comes with a β source irradiation shutter. In this way, the β-ray can be irradiated to the counter tube instead of the γ-ray irradiation by pressing the source detection function button without γ-ray, so that the selfcheck function for receiving the alarm circuit and the detection circuit function can be realized. Compared with the atomic signal alarm illuminometer, the chemistry agent alarm does not have such a self-test system, so it is necessary to add a BIT circuit to monitor real-time status information. The designed BIT circuit is as shown in Figure 3, A simple RC circuit is used between the poison alarm and the optocoupler isolator to form a double T circuit.The role played by the filter is to make the signal input to the microcontroller more stable after the final step-down. [6]

Conclusion
With the continuous upgrading of weapon equipment system, the application of BIT technology enhances the reliability of equipment. This paper first introduces four common BIT design methods and analyzes their advantages and disadvantages. According to the structural characteristics and functions of digital NBC protection system, referring to its typical failure mode, using the improved special hierarchical optimization method, summarizoing the normalized test cost and test resource cost of each fault detection method in the test set , and then the optimal test set is determined by the weighted calculation of each index. Finally, for the selected optimal test set, the BIT design of the poison alarm signal and the nuclear alarm signal processing circuit in the NBC protection system is carried out, and the BIT design of the atomic pollution alarm exposure meter and the poison alarm circuit state detection is carried out. The circuit design of BIT is completed in theory, which provides reference for the BIT design of other digital systems.