Development and optimization of 4.5kV IGBT for power system

In this paper, a 4500V IGBT is investigated by device simulation. The substrate resistivity and thickness of 4500V IGBT are determined by simulation, and the appropriate implantation dose of field stop layer is determined by the simulation. The test results show that the device can not meet the application requirements of power system, so we optimize the key parameters such as saturation voltage and safe operating area. The optimized device was fabricated and the experimental results show that the breakdown voltage is 6110V, the saturation voltage is 2.6V, and the maximum controllable turn-off current is 160A, which can well meet the simulation expectation and application requirements of power system.


Introduction
Insulated Gated Bipolar Transistors (IGBTs) have become one of the most indispensable power devices in the power switch applications, such as motor drivers, power suppliers, induction heating, electric tractions and so on. Recently, with the rapid development of smart grids, more power electronic equipment and power electronic technology applications are needed, and the core devices have gradually changed from semicontrolled devices (such as thyristor) to fully controlled devices (such as IGBT). Under the background of building a strong smart grid, IGBT, as a typical representative of new power electronic devices, plays a vital role in the relevant equipment of smart grid. In fact, for power grids techniques (such as high voltage direct current transmission (HVDC), flexible AC transmission systems (FACTs)), much attention has been focused on low conduction loss IGBTs with high voltage and large power capability. Considering the fact that the operation frequency for IGBT in power grid is relative low (~300Hz), the most loss of the IGBT comes from the onstate operation rather than the switching on/off operation. This means that to further enhance the IGBT performance in power grid, the saturation voltage (VCEsat) should be decreased.
In this paper, the structure of 4500V/50A IGBT chip is introduced. The key parameters (such as substrate specification and the implantation dose of field stop layer) were determined by the device simulation. By adding carrier storage layer and laser annealing process, the saturation voltage of IGBT was optimized, and the design requirements were finally achieved.

Design and Simulation
The cell structure diagram of FS-IGBT (Field Stop-IGBT) is shown in Figure 1. From the vertical perspective, FS-IGBT can be divided into near surface layer, voltagesustaining layer and collector area. The near surface layer is MOS structure, the voltage-sustaining layer is intermediate N-drift region and FS structure, while the collector region is located at the backside of IGBT and is composed of P+ layer and metal. The biggest difference between FS-IGBT and NPT-IGBT is that the electric field cutoff layer on the backside of FS-IGBT, it is also due to the existence of this layer, FS-IGBT chip thickness is thinner, and the saturation voltage is lower. [1][2][3]

substrate simulation
Firstly, we simulate the characteristics of FS-IGBT with different thickness substrates. The simulation results are shown in Figure 2. As shown in Figure 2, the breakdown voltage of FS-IGBT increases with the substrate thickness, which is due to the depletion of N-substrates with low doping concentration under the action of applied voltage, and the electric field cuts off in the N-type buffer layer, so the IGBT devices with thicker substrate thickness have thicker N-region to withstand the voltage. The saturation voltage of FS-IGBT also increases with the substrate thickness. When determining the thickness of the final substrate material, it is necessary to compromise the trade-off effect. Finally, we selected 550μm thick substrate to carry out subsequent simulation and experiment. Substrate resistivity also has a great influence on the characteristics of FS-IGBT. We simulate it and the results are shown in the Figure 3. The breakdown voltage of FS-IGBT increases with the substrate resistivity, which is not difficult to understand according to formula 1.

BVpp(Si)=5.34×10 13 ND -3/4
(1) However, the simulation results in Figure 3 show that the saturation voltage of FS-IGBT is slightly affected by the substrate resistivity. It is due to no significant difference in the conduction modulation effect in the Nsubstrate, and the carrier concentration is much higher than the original substrate doping concentration. In this case, the N-substrate resistance is determined by the carrier concentration, and the N-substrate resistance accounts for the saturation voltage of FS-IGBT. [4][5]

FS layer simulation
The simulation results of substrate resistivity in chapter 2.1 show that there is a contradiction between saturation voltage drop and breakdown voltage of IGBT, and the FS layer can balance the contradiction. The FS layer can reduce the drift zone thickness without changing the substrate resistivity, thus reducing the saturation voltage of the device. Therefore, we confirm that the concentration range of FS layer meets the requirement of breakdown voltage, and then analyze the effect of FS layer implantation dose on saturation voltage.  Table 1 shows the effect of FS implantation dose on the breakdown voltage and saturation voltage of FS-IGBT，and the junction depth of FS layer is fixed to 20μm. It can be seen that the effect of FS implantation dose on the breakdown voltage of IGBT is not obvious. In the range of FS dose 2E12~1E13, the breakdown voltage is above 6300V. But the saturation voltage of IGBT is very sensitive to the FS dose. This is due to the effective concentration of P+ collector will decrease with the increase of the doping concentration of N+ buffer layer, thus reducing the hole implantation concentration in N-drift region and increasing the saturation voltage of FS-IGBT. Figure 4 shows the effect of different FS doses on the electric field distribution during IGBT breakdown. It can be seen that the lower the FS implantation dose, the wider the depletion layer will be, but all of them will be cut off in the FS layer, so the breakdown voltage will not be greatly affected. According to the simulation results, the FS layer dose of 4500V FS-IGBT is 2E12 and the junction depth is 20μm.

Experimental results and optimization
We demonstrate the electrical characteristics of the proposed 4500V/50A FS-IGBT. The breakdown voltage of 4500V/50A IGBT chip is above 6150V, the saturation voltage is 3.7V, the turn-off switching energy is 62mJ, and the maximum controllable turn-off current is 90A.
In fact, the most loss of the high voltage IGBT comes from the on-state operation rather than the switching on/off operation. And due to the special requirements of power system application, IGBT devices are usually required to have a certain overload capacity (such as the operating conditions of DC circuit breaker require IGBT to be safely turned off several times the rated current), which is a very stringent requirement for the safe operating area and ruggedness of the device. Therefore, we should reduce the saturation voltage of FS-IGBT and optimize its safe operating area.
However, the substrate doping concentration of high voltage IGBT is relatively low (usually 10 13 cm -3 ), which leads to the dynamic avalanche when IGBT is turned off under high voltage and high current conditions, and the safe operating area of IGBT is limited to a great extent. The mechanism of dynamic avalanche is that a large number of plasma stored in the N-base region of the IGBT device is pumped to the cathode when the device is turned off. [6] With the depletion of the base region and the formation of the space charge region, the electric field intensity of the PN junction will continue to increase, and the holes extracted from the base region will appear at a certain field intensity when passing through the space charge region. In the case of velocity saturation, the hole current density Jp is determined by the hole concentration P drift velocity through the space charge region of the PN junction, as shown in formula 2.
At this time, the effective space charge density Neff in the depletion layer is shown in formula 3.
In Poisson equation, the space charge density determines the electric field gradient, as shown in formula 4.
Vpsat is the saturation drift velocity of the hole under strong electric field conditions, which is about 1×10 7 cm/s. When the current density of IGBT device is equal to 100A/cm 2 , p is equal to 8.2×10 13 cm -3 , which is much higher than the doping concentration ND in the drift region of the device. Therefore, the electric field intensity increases with the hole concentration. If the electric field intensity at PN junction reaches its critical breakdown electric field intensity, the dynamic avalanche will occur. M. Rahimo et al. pointed out that the anti-avalanche ability of IGBT can be effectively improved by increasing the emitter efficiency and the corresponding current gain of the backside P-region collector. [7][8] Increasing the doping concentration of P+ collector on the backside of IGBT can effectively improve the current gain of the collector and reduce the saturation voltage of the device. As shown in Figure 5, the saturation voltage of IGBT decreases with increasing P+ concentration. However, it is worth pointing out that when P + doping concentration was increased, the tail current of the device was also increase, resulting in the increase of turn-off time and turn-off loss. At the same time, the ordinary furnace tube thermal annealing cannot meet the peak concentration of more than 1E18 P+ activation, which need for laser annealing to achieve. [9][10]  In order to improve the chip characteristics and reduce the chip saturation voltage, an N-type layer with doping concentration higher than N-region is added between the P-well region and the N-drift region. In order to keep the neutral condition, the extra electrons are transmitted by N-channel, which improves the carrier concentration in N-drift region and reduces the on-state resistance. Different from increasing the doping concentration of the backside P+ collector, the carrier enhancement layer increases the carrier concentration at the emitter side, while the carrier concentration injected by the backside collector does not change, so it does not affect the turn-off loss of IGBT. [11]  The simulation results show that the peak value of surface electric field intensity of IGBT increases with the EP ( enhanced planar ) implantation dose under its breakdown voltage, as shown in Table 2. The simulation results show that when the EP implantation dose increases to a certain extent, the peak value of surface electric field strength is close to or exceeds the critical breakdown field strength of silicon 3×10 5 V/cm, and the breakdown voltage of IGBT decreases sharply. The typical electric field intensity distribution of IGBT under different EP implantation doses is shown in Figure 6, device in Figure.6 (a) has a higher implantation dose than the device in Figure.6 (b). It can be seen that with the increase of EP implantation dose, the surface peak electric field increases obviously, which will directly affect the electrical parameters such as breakdown voltage and leakage current of IGBT. We have tested the optimized 4500V/50A IGBT chip, and the dynamic test results are shown in the Figure 7. The parameters of optimized 4500V/50A FS-IGBT chip is compared with the conventional IGBT chip as shown in Table 3. It can be seen that the saturation voltage of 4500V IGBT chip has been reduced from 3.7V to 2.6V after optimization, and the breakdown voltage and turnon switching energy have not changed significantly. The turn off loss has increased. The maximum turn-off current of the chip has also been significantly increased, That is to say, the optimized chip has a wider safe operating area.

Conclusions
High voltage IGBT devices which widely used in the field of HVDC are more concerned about reducing the saturation voltage because of their low operating frequency. At the same time, IGBT is required to have a certain overload capacity under DC circuit breakers and other operating conditions, which also puts forward higher requirements for the safe operating area of the IGBT chip. Based on the simulation of a 4500V/50A FS-IGBT chip, this paper focuses on the optimization of saturation voltage and safe operating area parameters.
The experimental results show that the saturation voltage of the optimized 4500V/50A IGBT chip decreases from 3.7V to 2.6V, and the maximum turn-off current increases from 90A to 160A. The optimized device can better meet the application requirements of power electric equipment for high voltage IGBT chips.