DC Bus Control of Back-to-Back Connected Two-Level PWM Rectifier-Five-Level NPC Voltage Source Inverter to Torque Ripple Reduction in Induction Motor

This paper proposes a regulation method of back-to-back connected two-level PWM rectifier-five-level Voltage Source Inverter (VSI) in order to reduce the torque ripple in induction motor. First part is dedicated to the presentation of the feedback control of two-level PWM rectifier. In the second part, five-level Neutral Point Clamped (NPC) voltage source inverter balancing DC bus algorithm is presented. A theoretical analysis with a complete simulation of the system is presented to prove the excellent performance of the proposed technique.


Introduction
The effects of torque ripple are particularly undesirable in some demanding motion control and machine tool applications.They lead to speed oscillations which cause deterioration in the performance.In addition, the torque ripple may excite resonances in the mechanical portion of the drive system, produce acoustic noise, and, in machine tool applications, leave visible patterns in high-precision machined surfaces [1].
This paper investigates the use of a back-to-back connection of two-level PWM rectifier-five-level Voltage Source Inverter (Fig. 1).This connection allow balancing of the DC link capacitor voltages under a full range of operating conditions [2] whereas, only a limited operating range is possible if a passive rectifier (diode bridge) is employed [3].Additional advantages brought by the back-to-back connection have been shown to include: the ability to draw almost sinusoidal currents from the supply, the input power factor can be controlled and the back-toback topology automatically regenerates power back to the supply when the operating conditions dictate [4].Alternatively, a passive rectifier draws a pulsed current from the supply and does not allow a regenerative current to return to the supply.
In this paper, first part is dedicated to the presentation of three phases two-level PWM current rectifier regulation loop.After that the DC bus voltages balancing using the redundant vectors of five-level NPC inverter is explained.At the end the simulation results demonstrate efficacy of this of back-to-back converters DC bus control.

Feedback control of two-level rectifier
In this part, one proposes to enslave the output DC voltage of two-level PWM current rectifier using a PIbased feedback control.The synoptic diagram of twolevel PWM current rectifier control is shown in Fig. 2. The transfer functions G I (S) and G V (S) are expressed as follows: The modeling of this loop is based on the instantaneous power conservation principle with no loss hypothesis.This loop imposes the root mean square (rms) value of network current.
Input and output powers are: Different quantities i load , i c (Fig. 2) are defined as follows: MATEC Web of Conferences 28, 05002 (2015) DOI: 10.1051/matecconf/20152805002 © Owned by the authors, published by EDP Sciences, 2015 Using of the power conservation principle and neglecting of joules loss in the resistor R r , and considering a sinusoidal supply network current in phase with corresponding voltage V si , it can be written:

Simplified SVPWM of five-level NPC VSI
The space vector diagram of a five-level inverter can be considered to be composed of six hexagons that are the space vector diagrams of the three-level inverters.Each of these six hexagons, constituting the space vector diagram of a three level inverter, centers on the six apexes of the medium hexagon as shown in Fig. 3. To simplify into the space vector diagram of a threelevel inverter, two steps have to be taken.
Firstly, from the location of a given reference voltage, one hexagon has to be selected among the six hexagons.There exist some regions that are overlapped by two adjacent hexagons.These regions will be equally divided between the two hexagons as shown in Fig. 4.Each hexagon is identified by a number S defined in equation (6).Secondly, we translate the origin of the reference voltage vector towards the center of the selected hexagon as indicated in Fig. 5.This translation is done by subtracting the center vector of selected hexagon from the original reference vector.Tab. 1 gives the components d and q of the reference voltage V 3* after translation, for all the six hexagons.The index ( 5 To simplify into the space vector diagram of a two level inverter, we have to take the two steps mentioned above.Fig. 6 shows the translation of three-level reference voltage vector.The correction of its reference voltage vector is presented in Tab. 2.

Five-level NPC VSI balancing DC bus
In this part, one uses the redundant vectors of five-level NPC VSI to balance DC bus voltages [5].Since each leg has five possible switching states, five-level inverter has 5 3 = 125 states.Some positions of output voltage vector are synthesized by more than one switching state.In Fig. 7 and Tab. 3, we can find 24 positions with no redundancy (V37 to V60), 18 positions with two redundancies (V1 to V18), 12 positions with three redundancies (V19 to V30), 6 positions with four redundancies (V30 to V36) and 1 position with five redundancies (V61).
To know the impact of each vector on capacitors voltages, four steps must be followed: First one consists in definition of equations representing capacitors currents (i c1 , i c2 , i c3 and i c4 ) as a function of load currents (i 1 , i 2 and i 3 ) (Fig. 1) for each vector with redundant states.) Fourth step consists to choice the redundancies.For each case of redundancy, the vector which tends to cancel the unbalance in capacitor voltages will be selected.In other words, we select the vector which charge the undercharged capacitors, and discharge the overcharged ones.

Simulation results
Simulation is divided in three times.In first time ( 0S<t<2S ), the feedback control of the two-level rectifier is applied but the five-level VSI balancing DC bus algorithm is not used.
One remarks that the output voltage U cm of two-level rectifier is equal to its reference U cref =1040V (Fig. 8), but the voltages U c1 , U c2 , U c3 and U c4 are unbalanced (Fig. 9).One observes also that torque ripple of induction motor increase progressively (Fig. 10).
In second time (2S<t<7S), the five-level VSI balancing DC bus algorithm is applied.One remarks that the voltages U c1 , U c2 , U c3 and U c4 are balanced after few seconds (Fig. 9), One observes also that torque ripple decrease progressively (Fig. 10).
In third time (7S<t<10S), the nominal torque of induction motor is applied.One observe that voltages U c1 , U c2 , U c3 and U c4 are balanced and not disturbed after application of nominal torque (Fig. 9).

Conclusion
The present contribution intends to demonstrate that the unbalance of DC bus of back-to-back connected twolevel PWM rectifier-five-level NPC VSI, causes a torque ripple in induction motor.
The proposed feedback control algorithm to the twolevel rectifier associate to the space vector PWM balancing capacitor voltages of five-level NPC inverter algorithm shows a good following of the average output voltage of rectifier and the balancing of input voltages of inverter.Consequently, a torque ripple of induction motor is reduced.The proposed control algorithm opens the door to different applications of NPC multilevel converters in high power utilities such as, motor drives, doubly fed induction generators, active power filters and power supply networks interconnection.

Figure 2 .
Figure 2. Synoptic diagram of two-level PWM current rectifier control

Figure 3 .
Figure 3. Simplification of a five-level space vector diagram into two-level space vector diagram

Figure 4 .
Figure 4. Division of overlapped regions

Figure 5 .
Figure 5.Translation of five-level reference voltage vector

Figure 7 .
Figure 7. Space vector diagram of a five-level inverter

Table 1 .
Correction of five-level reference voltage vector

Table 2 .
Correction of three-level reference voltage vector

Table 3 .
Redundant vectors of a five-level inverterVectRedundanciesVectRedundanciesVectRedundancies