Stability analysis of a high-step-Up DC grid-connected two-stage boost DC-DC converter

High conversion ratio switching converters are used whenever there is a need to step-up dc source voltage level to a much higher output dc voltage level such as in photovoltaic systems, telecommunications and in some medical applications. A simple solution for achieving this high conversion ratio is by cascading different stages of dc-dc boost converters. The individual converters in such a cascaded system are usually designed separately applying classical design criteria. However these criteria may not be applicable for the complete cascaded system . This paper first presents a glimpse on the bifurcation behavior that a cascade connection of two boost converters can exhibit. It is shown that the desired periodic orbit can undergo period doubling leading to subharmonic oscillations and chaotic regimes. Then, in order to simplify the analysis the second stage is considered as constant current sink and design-oriented analysis is carried out to obtain stability boundaries in the parameter space by taking into account slope interactions between the state variables in the two-different stages.


Introduction
Power electronics systems are present in any application where there is a need to convert a form of electrical energy into another.Examples include power supplies in consumer electronics, industrial electric motor drives, electroheating, lighting and energy-efficient interfaces between renewable energy resources and the distribution grid.These systems make use of semiconductor switching components operating at a high switching frequency to reach the desired system response at a much slower time-scale than the switching time-scale.The switch-mode operation is forced by suitable pulse width modulation (PWM) schemes applied to the main switches of the system and in practice, the desired behavior is a periodic orbit with the same period of the sampling PWM period T which is in turn equal to that of an external clock signal.
One of the most used topology is the boost converter which play a major role in many industrial applications and it is necessary whenever it is required to step-up a source voltage to a higher voltage level [1].In many applications, a high step-up conversion ratio is needed.This is the case of, among others, uninterrupted power supplies (UPS), automobile high intensity discharge headlamps, and in some medical equipments.This is also the case of renewable energy applications such as distributed photovoltaic (PV) generation systems, fuel cell energy conversion systems and modern electrical vehicles.In these applications, although a simple boost converter can be normally used, there are many inconveniences with its use for high stepa e-mail: abdelali.elaroudi@urv.cat up ratio mainly related to increased stress in the components and the system efficiency.First, the voltage stress of the main switch is equal to the high output voltage, hence, a high-voltage rating switch with high on resistance should be used, generating high conduction losses.Second, high conversion ratio implies working with very high, some times prohibitive, values of duty cycles which would results in large conduction losses on the power device and this seriously decreases the system efficiency [1].As a result, the conventional boost converter is substituted with a high conversion ratio boost converters that could work with relatively low values of duty cycle.Although there are many different topologies that can carry out successfully this task, the system consisting of cascading two simple converters remain the most natural and efficient solution for this kind of applications.For instance, in the future power grid, not only the utilities, but also the users can produce electric energy by aggregating distributed generation sources.In that context, renewable energy sources such as photovoltaic (PV) arrays will be used to feed a main (dc or ac) bus.The problem is that the renewable energy sources generate voltage levels much lower than the grid voltage.Therefore cascaded schemes are necessary in this case.Moreover, in these kind of applications, storage elements such as batteries are connected to the dc bus through DC-DC converters for ensuring an autonomous energy supply.Figure 1 shows an example of a PV power system used in combination with bi-directional DC-DC converter and a back-up battery.the models.A model must be so simple to allow designoriented analysis of the dynamical behavior and the same time not so simple that details of the system behavior are lost.
The desired behavior of this switching systems is a periodic orbit with the same period as the PWM sampling period.However, due to difference in time scales and nonlinearities, it is possible that the system behaves with a periodic orbit with a period equal to a multiple integer of the sampling period [2].The system can even enter through different bifurcation scenarios into quasi-periodic or chaotic regimes.During the last couple of decades, much effort has been devoted to the study of nonlinear behavior in switching converters [2].A large variety of complex nonlinear instability phenomena, such as period doubling leading to subharmonic oscillations, and Hopf or Neimark-Sacker bifurcations leading to slow-scale instabilities or saddle-node bifurcation leading to jump phenomenon between different steady-state solutions have been reported in switchedmode DC-DC converters.These studies, which are mostly based on accurate approaches coping with nonlinear behavior such as discrete-time mappings [3] or the Floquet theory together with Filippov's method [4].These phenomena can have harmful effects on the system operation and may cause system failure, malfunctioning or even damages caused by the increase of the stress on the switching components which would rise the working temperature and this in turn would shorten the lifetime of the system.Therefore their study and prediction are important from both a theoretical and a practical points of view.
In this paper, the bifurcation behavior of two cascaded boost converters connected to a dc bus with a conversion ratio of about 6.5 is studied.The rest of this work is organized as follows: Section 2 deals with the description of the system under study.In Section 3, some bifurcation phenomena exhibited by the system are shown.Designoriented modeling of the system is addressed in Section 4. From a reduced-order model, stability boundaries in parameter space are obtained.Design-oriented stability conditions are obtained in Section 5 where slopes interaction are revealed.Finally, some concluding remarks are drawn in the last section.

High Conversion Ratio Problems and Solutions
The boost converter is shown in Fig. 2.This is a wellknown switching power converter able to produce a dc output voltage larger than its input dc voltage.It step-up the input voltage v g to a desired output voltage v o > v g with a suitable switching of the switch.Taking into account the switching and the magnetic components losses, the conversion ratio for a single boost converter will be given by [1] where D is the duty cycle and η is the efficiency given by where r L is the inductance equivalent series resistance (ESR), r DS is the MOSFET on resistance, r C is the ESR of the output capacitor and I out and V out are the output current and input current of the converter.For simplicity let us consider ideal switches and only losses in the energy storage elements will be taken into account.Let us also neglect the switching losses.Figure 3 shows the plot of the efficiency η as a function of the duty cycle D and the ratio ρ L = r L I out /V out .
It can be noted that the efficiency is highly degraded for high values of the duty cycle.This justifies the use of a cascade connection of boost converters to avoid using high values of duty cycles.The two-stage dc-dc converter considered in this study is shown in Fig. 4. It consists of a cascade connection of two boost converters.It is assumed that both converter stages operate in Continuous Conduction Mode (CCM).In this case, the inductor currents i L1 and i L2 never drop to zero.The switches are considered ideal and the Equivalent Series Resistances (ESRs) of inductors and capacitors are included in the model of the circuit.For the boost converter, a current loop is always necessary due to its non-minimum phase nature if the feedback variable is the output voltage [1].The system is controlled by comparing the inductor currents of the first and the second stages i L1 and i L2 with their reference values i ref1 and i ref2 .The inductor current in the first stage is controlled by a typical PCMC with an artificial T −periodic ramp compensator i a1 (t) with slope m a1 .With the aim to regulate the intermediate voltage v C1 and the inductor current i L2 in the second stage to their desired values, the corresponding errors are processed by PI compensators.The intermediate voltage loop provides current reference for the first stage but it can also provide this reference to the second stage.

Power stage model
By applying Kirchoff's current and voltage laws to the circuit depicted in Fig. 4, the cascade connection of the two converters can be mathematically described by the following set of differential equations where for the first stage (resp.second stage) δ 1 = 1 when the switch S 1 (resp.S 2 ) is closed and δ 1 = 0 when the switch S 1 (resp.S 2 ) is open.All the parameters that appear in ( 4)-( 6) are shown in Fig. 4. v C1 , i L1 , v C2 and i L2 are the state variables of the power stage that stand for the capacitor voltages and the inductor currents in the first and the second stages respectively.The variables δ 1 and δ 2 are the binary command signals used to drive the switches S 1 and S 2 respectively, and v g is the input voltage of the first stage.L 1 , L 2 , C 1 and C 2 are the inductances and the capacitances of the first and the second stages, r L1 , r L2 , r C1 and r C2 being their ESRs.

Controllers modeling
At the beginning of each switching cycle in the first stage, the switch S 1 is turned on.The controlled current i L1 increases until it reaches the signal i ref1 − m a1 (t mod T ), the switch S 1 is then turned off, and remains off until the next cycle begins.During this time, the switch S 1 is conducting.With the aim to regulate the output voltage to its desired value, the inductor current reference in the first stage is generated from an outer voltage loop PI controller whose input is the output voltage error e v1 = V ref1 − v o1 , v o1 = v C1 + r C1 dv C1 /dt, whose output is i ref1 given by where x 3 = e v1 (t)dt is the voltage error integral.With the aim to regulate the the inductor current i L2 in the second stage to its desired value, the error i ref2 − i L2 is processed by a PI current compensator whose output is given by where x 5 = e i2 (t)dt is the current error integral.During this time, the switch S 2 is switched on at the beginning of each switching period and switched off whenever v con2 crosses v r2 .The state of the switch S 2 is complementary to that of switch S 2 .The control signal for the second stage can be written in terms of this new additional variable as . The integral action of the previous controllers involve new system state variables which can be selected to be either the integral of the output of these controllers or simply the integral of the errors x 3 and x 5 .In this case, the extra state equations for these two variables are The  comparing in the second stage the control voltage v con2 with the T −periodic ramp modulator v r2 = m a2 t mod T .Therefore, the switch S 1 in the first stage is closed periodically each clock period and it is turned off whenever the following switching function is equal to zero, where i ref1 = W v V ref1 + F 1 x(t) is the reference current and, according to (11), the feedback vector in the first stage is ) ∈ R 5 is the vector of state variables of the system.In the second stage the switching decision is taken by comparing the control signal v con2 (t) := W i i ref2 + F 2 x(t) with a T −periodic ramp modulator v r2 (t), where the feedback vector in the second stage is F 2 = [0, −W i , 0, 0, W i ω zi ].The switching instants are therefore solutions of the following equation Note that F 1 and F 2 are also the normal vectors to the switching manifolds defined by ( 11) and ( 12) respectively.It is worth noting also that the system is linear for each switch pair state, and the nonlinearities arise in this kind of systems basically from interaction between feedback and switching processes that make the dynamics of the system highly nonlinear.For each state of the switch pair (S 1 , S 2 ), the system can be described by a set of linear differential equations that can be written as follows ẋ = A i j x + B i j , (i, j) ∈ {0, 1} 2 .Obtaining A i j and B i j from ( 4)-( 6) and ( 9)-(10) is straightforward.

Bifurcation behavior
The fixed circuit parameter values used in this study are shown in Table 1 and they are selected as practical values for a connecting a PV panel whose output voltage is v g = 50 V interfaced through a two-stage boost converter with a dc grid whose voltage is V dc =320 V [6].The switching frequency is f s = 100 kHz.This parameter is selected equal for both stages to avoid added complexities due to possible switching frequency interaction.The intermediate voltage v C1 is regulated to approximately 200 V in order to make the first stage to work with a duty cycle D 1 = 75% therefore a ramp compensator is needed in this stage.The duty cycle in the second stage is D 2 = 0.375 and according to a classical design criterion no ramp compensation is needed.In the classical design, the minimum ramp needed to avoid subharmonic oscillations in a boost converter is given by the following expression [1] v where m a is the slope of the T -periodic artificial ramp compensator and D is the duty cycle, v o is the output voltage and L is the inductance value.In our example, we have for the first stage m a,cri,1 where D 1 = 0.75, i.e, m a,cri,1 ≈ 119 kA/s, being the switching frequency used f s = 100 kHz, the minimum ramp amplitude must be 1.19.Therefore with a ramp amplitude equal to 1, the system must be unstable.However, we will see that this is not the case.Moreover, the minimum ramp compensator will be determined.For the second stage, the duty cycle is D 2 = 0.375 < 0.5 and a priori, the system can be stable even without a ramp compensator.This is the case a standalone converter.In our interconnected scheme, a ramp voltage whose amplitude is V M2 = 1 V has been used in order to avoid subharmonic oscillation at the second stage due to possible interaction with the first stage.
Figure 5 shows the steady-state response of the system for m a1 = 100 • 10 3 A/s and m a1 = 0.7 • 10 3 A/s.It can be observed that while the controlled variables are well regulated their desired values and the second stage is stable for both parameter values, the steady-state cycle-by-cycle behavior of the first stage exhibits fast-scale subharmonic oscillation for I M1 = 0.7 • 10 3 A. In order to investigate further the bifurcation phenomena in the system, a bifurcation diagram is computed by taking m a1 as a bifurcation parameter which is varied between 0 and 25 kA/s for three values of the output capacitances C 1 =200 μF, 400 μF, 600 μF and 800 μF.The results are shown in Fig. 6.It can be observed that the larger the capacitance C 1 is, the larger the ramp slope required for stabilization is.

Model reduction
The inductor current i L2 in the second stage is programmed to track perfectly in average its reference current i ref2 by using a PI controller.Of course, this average current controller may fail in carrying out this task and the second stage may exhibit fast-scale subharmonic oscillation or slowscale low frequency oscillation.Both instabilities can be avoided by selecting appropriately the ramp slope or amplitude according to a traditional design because the output voltage is constant.Under these circumstances, the average value of the inductor current in the second stage is tightly regulated in such a way that can be substituted by its reference value without losing accuracy, i.e., i L2 ≈ i ref2 [5].Therefore, the cascaded system can be approximated by the simplified scheme depicted in Fig. 7.The averaged output current in the second stage will be i ref2 /M 2 (D 2 ).The first stage can therefore be seen as a boost converter loaded 06002-p.4   by a constant current sink whose dynamic behavior and its output voltage controller design has been recently addressed by state-space averaging technique [6].However, nonlinear analysis and the bifurcation phenomena have not been reported to the author's knowledge.It is worth to note that this approximation is also valid if the second stage is another converter topology rather than the boost converter considered in this study.Note also that although a fullorder model can be used to obtain numerically the critical value of the parameters, it is more useful to have a simplified reduced-order model to speed-up the simulation [5] or even to derive from it explicit analytical expressions for the stability boundaries as it will be done in the next section.The simplified system can be mathematically described by the following set of differential equations

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which can be written in matrix form as follows where

Stability boundaries in the parameter space
Let . In [7] has been shown that at the onset of subharmonic oscillation boundary, the following condition is fulfilled where Δẋ(DT Although the previous equation is a closed-form expression for the stability boundary, its use for design-oriented analysis is not easy.To overcome this problem, the following section provide design-oriented expression suitable for the choosing parameter values that guarantee stability in the parameter space.

Design-oriented stability conditions and slope interactions
In steady-state, the slope of the intermediate capacitor voltage is governed by the following equations The slope of the output voltage of the first stage is given by From (28), the inductor current reference i ref1 in the first stage is given by whose slope during the conducting time is given by where in the last expression it has been considered that v o1 ≈ V ref1 and that i ref2 is constant.Therefore the new expression for the minimum ramp needed to avoid subharmonic oscillations in a current mode controlled dual-stage cascaded boost converter is given by the following expression < m a (30) Figure 8 shows the boundary between stable and unstable regions in the parameter space (D, m a1 ) for different values of W v and C 1 obtained from (23).The new critical value is smaller than the traditionally used.Therefore a classical design procedure can predict subharmonic oscillation while the system is still stable.The new design-oriented expression (30) is more accurate.

Conclusions
High conversion ratio cascaded boost converters are applied in a broad range of applications.The advantage of using cascaded converters is that a desired output voltage/current can be obtained with higher efficiency than in single stage systems and that a specified variation in output voltage can be realized faster and more precisely.The penalty is the added complexity that follows from using a large number of components and the interaction between the different stages.In this paper an investigation of the dynamics of a cascade connection of current mode controlled boost converters is performed.A reduced-order model has been obtained allowing the obtaining closed-form expressions for the stability boundaries.

Fig. 1 .
Fig.1.Photovoltaic power system connected to a dc grid through a bidirectional dc-dc converter with a back-up battery.

Fig. 4 .
Fig. 4. Schematic circuit diagram of a boost switching converter loaded by another boost switching converter.The first stage is under a PCMC with its output voltage loop closed.The average input current in the second stage is tightly regulated by PI compensator

Fig. 5 .
Fig. 5. Waveforms of the state variables and the control signals in the two stages.While the second stage is stable, the first stage exhibits subharmonic fast-scale instability.C 1 = 500 μF

777Fig. 6 .
Fig. 6.Bifurcation diagram by taking m a1 as a bifurcation parameter for different values of C 1 .Dashed vertical line stands for the stability boundary according to the traditional approach.

Table 1 .
The used parameter values.