A Closed Form Expression for Predicting Fast Scale Instability in Switching Buck Converters

Fast scale instability is an undesired phenomenon in switching converters. In past studies, its prediction has been mainly carried out by deriving discrete time models and then linearizing the system in the vicinity of a fixed point. However, the results obtained from such an approach cannot be applied for design purpose except for simple cases of current mode control. Alternatively, in this paper, this phenomenon is analyzed by using a unified formal symbolic approach which can be applied for different control strategies. This approach is based on expressing the condition for fast scale instability occurrence using Fourier series and then converting the result into a matrix form expression which depends explicitly on the system parameters making the results directly applicable for design purpose. Under certain practical conditions concerning these parameters, the matrix form expression can be approximated by standard polynomial functions depending on the operating duty cycle. The approximating polynomial functions are widely related to the well known Clausen polynomial functions. The results presented in this work clearly generalize the well known stability condition of current mode control.


Introduction
Switching converters are integral elements to modern power electronics.Despite their widespread use, they can pose serious challenges to power-supply designers because almost all of the rules of thumb governing their design are only applicable to the linearized averaged system even though the system works in switched mode [1], [2], [3].Switch mode operation is carried out by means of Pulse Width Modulation (PWM) action on the switches.In the traditional PWM control, the duty cycle of the pulse driving signal u(t) is varied according to the error v e (t) between the output variable (voltage or current) and its desired reference v re f .This error is processed through an error amplifier to provide the control voltage v c (t).In Voltage Mode Control (VMC) or duty cycle control, the simplest analog form of generating a fixed frequency PWM is by comparing the control voltage with a ramp periodic signal v tri (t) in such a way that the pulse signal u(t) goes high/low when the control signal v c (t) is higher/lower than the triangular signal v tri (t).In peak Current Mode Control (CMC), the switch is turned ON periodically while it is turned OFF whenever the peak inductor current reaches a reference signal dictated by the output voltage error signal and a ramp compensator.Figure 1(a) shows a schematic circuit diagram of a DC-DC buck converter under a general control scheme encompassing both VMC and CMC.It can be recognized that the voltage at the input of the RLC circuit (diode voltage) is essentially a square wave with amplitude v g (input voltage).This fact justify the equivalent block diagram in Fig. 1(b).It is worth to note that a CMC converter generally uses the inductor current, as well as the output voltage error signal, as input signals to the PWM modulator.According to Fig. 1(b), the state equations of the system a e-mail: abdelali.elaroudi@urv.cat can be written as follows where x(t) is the vector of the state variables corresponding to the power stage (capacitor voltage v C and inductor current i L ) and probably to the controller.v re f is the reference signal and g is an appropriate gain.u(t) is the square wave driving signal with steady state duty cycle D defined as the ratio between the ON time duration (u(t) = 1) and the entire switching period T .A, B, and G are system matrices to be specified later.MATEC Web of Conferences the expression of the system matrices will depend on the controller used.In practice, it is desirable that the system operates periodically with a constant switching frequency f s = 1/T equal to that of the external sawtooth ramp signal which is the same frequency of the external clock signal.However, under parameter changes, the stability of this operating mode may be lost resulting in different kinds of instabilities and dynamical behaviors [4].There have been hitherto many research efforts devoted to predict the border of occurrence of such instabilities.In the past studies, the prediction of fast scale instability has been mainly based on deriving an accurate discrete time model and then linearizing it in the vicinity of the operating point [5], [3].
Recently, Filippov's method and the monodromy matrix have been used to predict these instabilities in DC-DC converters and similar results to those obtained from the discrete time approach were derived [7], [8].However, the results obtained from both approaches, although very accurate, are not suited to obtain clear design-oriented criteria in the parametric design space.Exceptionally, the fast scale instability can be perfectly predicted in the CMC system examining mainly the slopes of the inductor current during the ON and the OFF time durations [1].For example, from the well known slope-based criterion in [1], it can be shown that in order to guarantee the stability of a peak CMC DC-DC buck converter with a compensating ramp and with voltage loop open, the following inequality, in terms of the duty cycle D and the system parameters, must hold 1 where L is the inductance of the inductor, V M is the amplitude of the triangular signal v tri (t), and T its period (See Fig. 1).However, in situations where the control voltage has not a triangular shape, the slope-based criterion (4) can not be applied.This is the case of control schemes like VMC or average CMC.A ripple-based approach has been suggested in [9]- [10] as a design-oriented approach for locating the boundary of fast scale instability in a VMC buck converter demonstrating that effectively (4) can not be applied in this case.An equivalent expression to (4), in the case of a generic control scheme, will be extremely helpful in designing switching converters free from fast scale instability.This paper tries to develop a similar expression as (4) for different control strategies.The rest of this paper is organized as follows: Section II presents a Fourier-analysis-based condition from [11], written as a Fourier series in the frequency domain, for fast scale instability occurrence in the DC-DC buck converter.In Section III, a closed form expression for this series is obtained.This expression is then simplified and specified in Section IV for different control strategies.A widely studied VMC DC-DC buck converter is used as an example to illustrate the theoretical results derived in this paper.Finally, in the last section, some concluding remarks of this work are summarized.

Fourier-analysis-based condition for fast scale instability occurrence
This section is an overview of the results derived in a quite interesting but overlooked work [11].Expanding the square wave diode voltage in a Fourier series and operating on each term of the u-to-v c open loop transfer function H(s), equating the resulting expression to the ramp signal at the switching instants defined by the crossing between v c (t) and v tri (t), conditions for different periodicities can be obtained.In [11] it has been shown that at the boundary of the first period doubling, an equality in the form S(D) = V M holds, where S(D) is the series given by ω s = 2π/T being the angular switching frequency, θ = 2πD and j the imaginary unit.Therefore the system will be free from fast scale instability whenever the following inequality holds 1 Note that inequality (6) looks like the well known condition (4) but it is more general.

A Generic analytical matrix form expression for predicting fast scale instability
In [11], the series S(D) in ( 5) has been approximated by the term that involves the transfer function H(s) with the smallest argument or solved graphically by truncating the series to an arbitrarily large number of harmonics.In this work, a closed form expression will be given for the series S(D) defined in (5).It will also be shown later that by considering practical operating conditions, this series can even be approximated by polynomial functions depending on the power stage and controller parameters and more importantly on the steady state value of the duty cycle D. Differently to [11], let us express H(s) as follows (See Fig. 1(b)) where R A (s) is known in matrix theory as the resolvent of the matrix A which is given by [12] I is a unity matrix with appropriate dimensions.Then, from (8), the series S(D) in (5) becomes By using the Poisson sum formulae one can write [13] ∞ where h(t) is the impulse response which for the loop gain of the system described in (1)-( 3), with input u(t) and output v c (t), is given by Using ( 10) and (11), one obtains Using the Poisson sum formulae together with the modulation and the delay properties of the Fourier series, one obtains Equations ( 12)-( 14), when substituted in (5), give the following closed form expression for the series S(D) Therefore, the condition (6) for the system to be free from fast scale instability can be written as follows The inequality (16) can be considered as a generalized expression of (4) for different control schemes.This inequality can be solved in closed form for some design parameters like v g , V M , T and g to locate the boundary between the desired stable periodic behavior and fast scale instability.For instance, from ( 16), an expression for the input voltage v * g (D) in terms of the circuit parameters and the duty cycle D at the boundary of fast scale instability is

Approximate expression for predicting fast scale instability
It is instructive to apply the previous results to a buck converter with a simple but representative proportional controller (CMC or VMC) with static gain g although the results can be extended for the case of a dynamic controller.With a simple proportional control, the expressions of the matrix A and vector B are given by The vector of the state variables is x(t) = (v C , i L ) ′ .The resolvent matrix can be written in the following formal geometric series expansion [12] Therefore, from ( 9) and ( 19), the series S(D) can be expressed as follows  where S m (θ) is the series given by The expression of S m (θ) can be obtained in closed form in terms of the variable θ (recall that θ = 2πD) for each value of m.In fact, S m (θ) is an m-th polynomial function of θ and can be obtained as follows where cl m (θ) are known as Clausen functions [14] and ζ(m) is the Riemman Zeta function which can be expressed for even value of m as follows: where B m are called Bernoulli numbers [15].Table 1 shows the expressions of the Clausen functions cl m (θ) for m = 1 . . . 5. Figure 2 shows the curves of these functions in terms of θ.The polynomial functions cl m have the following interesting property To have a flexibility to deal with both VMC and peak CMC, let us consider a signal y(t) (See Fig. 1) that can be expressed as a linear combination of the output voltage and CSNDD 2012 10011-p.3 the inductor current, i.e, y(t) = g v v(t) + g i i L (t).Therefore, the row vector G can be written as follows: G = (g v , g i ), where g v and g i represent the voltage and the current sensor gains respectively.Note for example, that for VMC g i = 0, g v 0 while for CMC with voltage loop open, g v = 0 and g i 0. For CMC with voltage loop closed, g v 0 and g i 0. It is to be pointed out that the previous expression of G is valid only for the case of static controllers.For the case of a dynamic controller, this vector must be adapted to include the terms corresponding to the state variables of the controller.The expressions of gT m GA m−1 B in (20), for the first five values of m are given below for a general static control scheme encompassing both VMC and CMC. where The high order terms are omitted to save space.However, these terms can be ignored for practical values of circuit parameters as it will be shown later.This is because for large enough |s| with respect of the magnitude of the eigenvalues of the matrix A, as it is the case in DC-DC converters, one can approximate R A (s) by the two first terms in (19) and therefore in most cases, these terms are necessary and sufficient to predict fast scale instability.Ignoring terms for m ≥ 3, and after some algebra, the following expression for the critical input voltage is obtained

Current mode control
It can be noted from (30) that with voltage loop open (g v = 0, g i = 1, g = 1), only the first term gT GB = T/L in the dominator is dominant in (20) and therefore ( 16) becomes (4) only if higher order terms are ignored.With voltage loop closed, in addition to the first term gT GB, the second term gT 2 GAB is also significant and it has to be taken into account.Therefore, a more accurate expression is (30).

Voltage mode control
In VMC, (30) is also valid if one makes g i = 0.The first term gT GB in (20) is zero and the second term gT 2 GAB is necessary to predict the fast scale instability occurrence.
The first term will be also zero for the case of a pole-zero cancelation between a controller pole (in the case of a dynamic controller) and the zero of the power stage due to the ESR of the output capacitor.In this case, the following expression is obtained for the source voltage at the boundary of fast scale instability if Eq (31) is the same expression obtained in [9] by using a quite different approach.
Example: Consider the well known and widely studied example of buck converter considered first in [4] and later by other researchers in [5], [6], [7].For this example, the input voltage v g and the duty cycle D in the nominal T −periodic regime are related approximately by the following expression which can be obtained from a simple averaged model The same set of parameter values used in [5], [6], [7] will be considered so that the readers can make the comparison easily.Namely, L = 20 mH, C = 47 µF, V l = 3.8 V, V M = 4.4 V, T = 400 µs, v re f = 11.3V and g v = 1, g i = 0, g = 8.4.Numerical simulations are not repeated here to save space.Interested readers can see [4], [7] and [8] for both numerical simulations and experimental measurements.Traditionally the dynamic behavior of the system in this example has been studied in terms of the input voltage v g [4], [5], [7], [8].In Fig. 3, the exact mesh plot of v * g (D) from ( 17) is shown together with the approximated plot from (31).
From Fig. 3, it can be observed that for sufficiently large values of R (T/(RC) << 1), a good concordance is obtained, while a discrepancy exists between the exact and the approximated plots for relatively low values of R.This discrepancy becomes significant for time constant RC approaching the switching period T .For RC ≥ T , (31) will give inaccurate results.
Figure 4 shows the plots of v * g (D) from ( 17) and its approximation in (31) for two different values of the load resistance R together with (32) in terms of the duty cycles D. The critical value of the input voltage V g,cri is the intersection of the curves v g (D) from (32) and v * g (D) from ( 17) or (31).This critical value can be determined approximately by subtracting (32) from (31), equating the resulting expression to zero and solving for D and then substituting in (32) or in (31).For instance, for R = 22 (Fig. 4-(b)), the critical value of the input voltage V g,cri ≈ 24.51 V (for D ≈ 0.47) which is in perfect agreement with [5], [7], [8].For this value of the load resistance, T/(RC) ≈ 0.38 is relatively small and the critical value can be also obtained accurately from the approximated expression (31).As R decreases, the value of the intersection point V g,cri increases as predicted in [7] by using a numerical approach based on Fillipov method and the associated monodromy matrix.For example, for R = 5 Ω, the critical value of the input voltage is approximately 31 V which is in perfect agreement with [7] (See Fig. 7 in [7]).From the approximated expression of v g (D) one still obtains V g,cri ≈ 24.51 V.This discrepancy is mainly due to the fact that T/(RC) ≈ 1.7 > 1 implying the necessity to use high order terms.

Conclusions
Fast scale instability in CMC converters is well documented by different analytical methods by considering the voltage loop open.However, with voltage loop closed and for VMC, this phenomenon has been only characterized by using numerical simulations or mainly based on abstract mathematical analysis using a discrete time model or the Fillipov method.Explicit expressions for conditions of fast scale instability occurrence in VMC and average CMC have been unavailable for many years.The widely known expression for predicting fast scale instability in CMC is shown to be a special case of the general results presented in this paper.In fact, the approximating polynomial functions appearing in the expression defining the boundary of fast scale instability are widely related to the well known Clausen polynomial functions.In CMC the first order Clausen polynomial function is dominant while in VMC, the second order Clausen polynomial function is dominant.Based on the general unified approach used in this study, critical values of the system parameters can be located accurately for different control schemes.The results have been illustrated for a DC-DC buck converter with a simple proportional VMC widely considered in the literature.Works are in progress using the approach developed in this study to deal with dynamic control schemes as well as to extend it to different switching converter topologies.The results will be reported in a further study.

Fig. 1 .
Fig. 1.(a) Block circuit diagram of a DC-DC buck converter under generic CMC.(b) Equivalent block diagram.

Fig. 3 .
Fig. 3. Exact and approximated stability surface v * g (D) in terms of the duty cycle D ∈ (0, 1) and the load resistance R ∈ (5, 50) Ω showing that for relatively high values of T/(RC), (31) is not enough accurate.

Fig. 4 .
Fig. 4. Stability boundaries of the buck converter with VMC in terms of the input voltage v g and the duty cycle D for two different values of the load resistance R. Solid: exact curve.Dashed: approximated curve.Left: R = 5 Ω.Right: R = 22 Ω.

Table 1 .
Polynomial Clausen functions cl m (θ) for different values of m.